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atomic: Spin locks now try to use the x86 PAUSE instruction for short waits.
Fixes Bugzilla #4151.
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@ -32,6 +32,10 @@
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#include <atomic.h>
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#endif
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#if defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64))
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#include <xmmintrin.h>
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#endif
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#if defined(__WATCOMC__) && defined(__386__)
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SDL_COMPILE_TIME_ASSERT(locksize, 4==sizeof(SDL_SpinLock));
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extern _inline int _SDL_xchg_watcom(volatile int *a, int v);
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@ -116,12 +120,31 @@ SDL_AtomicTryLock(SDL_SpinLock *lock)
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#endif
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}
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/* "REP NOP" is PAUSE, coded for tools that don't know it by that name. */
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#if (defined(__GNUC__) || defined(__clang__)) && (defined(__i386__) || defined(__x86_64__))
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#define PAUSE_INSTRUCTION() __asm__ __volatile__("rep nop\n")
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#elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64))
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#define PAUSE_INSRUCTION() _mm_pause() /* this is actually "rep nop" and not a SIMD instruction. */
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#elif defined(__WATCOMC__) && defined(__386__)
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extern _inline void PAUSE_INSTRUCTION(void);
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#pragma aux PAUSE_INSTRUCTION = "rep nop"
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#else
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#define PAUSE_INSTRUCTION()
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#endif
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void
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SDL_AtomicLock(SDL_SpinLock *lock)
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{
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int iterations = 0;
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/* FIXME: Should we have an eventual timeout? */
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while (!SDL_AtomicTryLock(lock)) {
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SDL_Delay(0);
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if (iterations < 32) {
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iterations++;
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PAUSE_INSTRUCTION();
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} else {
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/* !!! FIXME: this doesn't definitely give up the current timeslice, it does different things on various platforms. */
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SDL_Delay(0);
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}
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}
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}
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