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129 lines
4.1 KiB
C++
129 lines
4.1 KiB
C++
#ifndef CELT_FIXED_GENERIC_MIPSR1_H
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#define CELT_FIXED_GENERIC_MIPSR1_H
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/* Copyright (C) 2007-2009 Xiph.Org Foundation
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Copyright (C) 2003-2008 Jean-Marc Valin
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Copyright (C) 2007-2008 CSIRO */
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/**
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@file fixed_generic.h
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@brief Generic fixed-point operations
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*/
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/*
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
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OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#undef MULT16_32_Q15_ADD
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static inline int MULT16_32_Q15_ADD(int a, int b, int c, int d) {
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int m;
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asm volatile("MULT $ac1, %0, %1" : : "r" ((int)a), "r" ((int)b));
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asm volatile("madd $ac1, %0, %1" : : "r" ((int)c), "r" ((int)d));
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asm volatile("EXTR.W %0,$ac1, %1" : "=r" (m): "i" (15));
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return m;
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}
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#undef MULT16_32_Q15_SUB
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static inline int MULT16_32_Q15_SUB(int a, int b, int c, int d) {
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int m;
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asm volatile("MULT $ac1, %0, %1" : : "r" ((int)a), "r" ((int)b));
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asm volatile("msub $ac1, %0, %1" : : "r" ((int)c), "r" ((int)d));
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asm volatile("EXTR.W %0,$ac1, %1" : "=r" (m): "i" (15));
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return m;
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}
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#undef MULT16_16_Q15_ADD
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static inline int MULT16_16_Q15_ADD(int a, int b, int c, int d) {
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int m;
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asm volatile("MULT $ac1, %0, %1" : : "r" ((int)a), "r" ((int)b));
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asm volatile("madd $ac1, %0, %1" : : "r" ((int)c), "r" ((int)d));
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asm volatile("EXTR.W %0,$ac1, %1" : "=r" (m): "i" (15));
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return m;
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}
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#undef MULT16_16_Q15_SUB
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static inline int MULT16_16_Q15_SUB(int a, int b, int c, int d) {
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int m;
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asm volatile("MULT $ac1, %0, %1" : : "r" ((int)a), "r" ((int)b));
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asm volatile("msub $ac1, %0, %1" : : "r" ((int)c), "r" ((int)d));
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asm volatile("EXTR.W %0,$ac1, %1" : "=r" (m): "i" (15));
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return m;
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}
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#undef MULT16_32_Q16
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static inline int MULT16_32_Q16(int a, int b)
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{
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int c;
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asm volatile("MULT $ac1,%0, %1" : : "r" (a), "r" (b));
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asm volatile("EXTR.W %0,$ac1, %1" : "=r" (c): "i" (16));
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return c;
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}
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#undef MULT16_32_P16
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static inline int MULT16_32_P16(int a, int b)
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{
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int c;
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asm volatile("MULT $ac1, %0, %1" : : "r" (a), "r" (b));
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asm volatile("EXTR_R.W %0,$ac1, %1" : "=r" (c): "i" (16));
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return c;
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}
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#undef MULT16_32_Q15
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static inline int MULT16_32_Q15(int a, int b)
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{
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int c;
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asm volatile("MULT $ac1, %0, %1" : : "r" (a), "r" (b));
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asm volatile("EXTR.W %0,$ac1, %1" : "=r" (c): "i" (15));
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return c;
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}
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#undef MULT32_32_Q31
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static inline int MULT32_32_Q31(int a, int b)
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{
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int r;
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asm volatile("MULT $ac1, %0, %1" : : "r" (a), "r" (b));
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asm volatile("EXTR.W %0,$ac1, %1" : "=r" (r): "i" (31));
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return r;
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}
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#undef PSHR32
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static inline int PSHR32(int a, int shift)
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{
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int r;
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asm volatile ("SHRAV_R.W %0, %1, %2" :"=r" (r): "r" (a), "r" (shift));
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return r;
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}
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#undef MULT16_16_P15
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static inline int MULT16_16_P15(int a, int b)
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{
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int r;
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asm volatile ("mul %0, %1, %2" :"=r" (r): "r" (a), "r" (b));
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asm volatile ("SHRA_R.W %0, %1, %2" : "+r" (r): "0" (r), "i"(15));
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return r;
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}
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#endif /* CELT_FIXED_GENERIC_MIPSR1_H */
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